October 16, 2026 — The first 1,024-NPU Atlas 950 SuperPoD was powered on this week, and it came online with a 0-day adaptation of StepFun's Step 5 Preview model. This is the largest supernode deployment publicly documented to date: 1,024 Ascend 950 NPUs in one cluster, liquid-cooled end to end, addressed as a single machine.

For two years, the debate about domestic AI chips has focused on per-chip performance. Trillion-parameter models changed the question. A cluster of 1,024 fast chips is useless if they spend most of their time waiting for data to cross switches. The engineering problem is not "how fast is one card" but "can a thousand cards behave like one."

1. The numbers

MetricFigureWhat it means
NPUs per cluster1,024 Ascend 950The largest publicly documented domestic supernode deployment
FP8 compute1 EFLOPS10^18 operations per second, aimed at trillion-parameter training and inference
FP4 compute2 EFLOPSDouble throughput at lower precision, suited to high-concurrency inference
Global unified memory256TBNPU memory is addressed as one pool; models do not have to be split per card
InterconnectTB/s classClose to on-package bandwidth, reducing the communication wall
End-to-end latency3μsDirect cross-card access without protocol conversion or switch hops
CoolingFull liquid coolingCompute and interconnect racks are liquid-cooled
FabricUnifiedBus (Lingqu)Huawei's interconnect, designed to scale to 8,192 NPUs
NPUs per cluster: 1,024 deployed vs 8,192 design ceilingUnifiedBus is designed to scale well beyond the first deploymentDeployed in this cluster1,024Atlas 950 design ceiling8,192Sources: Huawei MWC 2026 press release (8,192 ceiling); EE Times China, 16 Oct 2026 (1,024 deployment).
Figure 1. The first deployment uses 1,024 NPUs; the architecture is designed for up to 8,192.

2. Why a SuperPoD is not just a rack of GPUs

A conventional AI cluster is built from 8-GPU servers connected by InfiniBand or Ethernet through multiple layers of switches. When a model is split across cards, tensor parallelism generates frequent all-reduce traffic. Every cross-server exchange pays a latency penalty, and the penalty grows with cluster size.

A SuperPoD replaces the network with a bus. NPUs address each other directly, memory is globally addressed, and the cluster behaves like one machine. Huawei's UnifiedBus is the key piece: it is what allows 1,024 cards to communicate at TB/s with 3μs end-to-end latency instead of going through a stack of switches.

Inside a 1,024-NPU liquid-cooled SuperPoDCompute and interconnect racks are liquid-cooled; NPUs address each other directlySuperPoD boundaryComputeComputeComputeInterconnectStorage / mgmt256TB globally addressed memory · TB/s interconnect · 3μs end-to-end latencyLogical diagram. Rack count and cards per rack are not drawn to scale.
Figure 2. Compute racks provide the NPUs; the interconnect rack turns 1,024 cards into one logical system.

The hard part is not filling a rack with cards. It is three things:

3. Why 1,024 is a threshold

1,024 is not an arbitrary number. It is roughly the entry point for a "thousand-card" training cluster:

4. Build, rent or hybrid

ModelWho it suitsReality check
Build your own SuperPoDHyperscalers, national and industry AI centersHundreds of millions of RMB, liquid-cooled halls, specialist operations, power quota
Rent capacityMost SMEs and university labsPay per card-hour or per token; no capex, but check data residency and compliance
HybridCompanies with steady inference demandSmall local cluster for core workloads; burst training in the cloud

For manufacturers, trading companies and public-sector buyers in the Pearl River Delta, the practical question is not "should we own 1,024 cards" but "what do we need the model to do." Document Q&A, visual inspection and customer-service assistance usually need one to four inference cards. Fine-tuning an industry model is better rented by the thousand-card-hour than owned.

5. Liquid cooling is the entry ticket

The SuperPoD ships with full liquid cooling, which changes what a machine room must provide:

6. A reality check

Lighting up 1,024 NPUs is an engineering milestone, not proof that domestic chips have caught up across the board. Per-chip efficiency, the CUDA software moat, model coverage and long-term cluster stability still need real workloads to prove. Buyers should insist on a proof of concept on their own data rather than choosing a platform because of a headline number.

Sources