1. On 29 September, AMD published the full price list for 31 server CPUs
On 29 September 2026, AMD published complete specifications and per-thousand-unit pricing for the sixth-generation EPYC 9006 series (codenamed Venice) on its own site. This was not a minor refresh. It is the first time AMD has published a complete price sheet for server processors spanning 8 to 256 cores across two socket platforms — 31 SKUs disclosed at once, from $700 to $14,904.
The headline specifications: the sixth-generation EPYC 9006 is built on the Zen 6 / Zen 6c architecture on TSMC's 2nm process, the first microarchitecture AMD has designed from the ground up specifically around data centre workloads. The flagship EPYC 9996 carries 256 cores and 512 threads, 1GB of L3 cache, and a 600W default CPU power rating. AMD's official blog states the top configuration offers up to 16 channels of DDR5, JEDEC-standard MRDIMM support up to 12,800 MT/s, and PCIe Gen 6 connectivity.
One easily missed detail: from the sixth-generation EPYC onward, AMD has retired the term TDP in favour of "Default CPU Power." The company defines it as the total power consumed across the compute and I/O dies for the stated performance target. The change is more than wording — TDP is a design ceiling, while Default CPU Power is measured real-world consumption, and the latter is the more useful number when sizing a rack's power and cooling.
2. Two sockets: how SP7 and SP8 differ
The most confusing aspect of EPYC 9006 is its dual-socket design. SP7 and SP8 are not a "premium and budget" pairing but two platforms aimed at very different machines:
| Comparison | SP7 (high-end data centre) | SP8 (entry / volume) |
|---|---|---|
| SKU count | 9 | 22 |
| Core architecture | Both Zen 6 and Zen 6c | Zen 6c only |
| Core range | 64 cores minimum, up to 256C/512T | 8C/16T minimum, up to 128C/256T |
| Memory channels | 16-channel DDR5, up to ~1.6 TB/s | 8-channel DDR5 |
| PCIe 6.0 lanes | 96 | 128 — about a third more than SP7 |
| Power range | 400W to 600W | 130W to 400W |
| Shipping | Q4 2026 | H1 2027 |
Three things in that comparison matter directly for purchasing and operations:
- SP8 has more PCIe lanes than SP7. If you need to attach many NICs, NVMe drives or HBA cards, SP8's 128 lanes is roomier. Lane count is not performance, but it caps how many cards you can install — a real constraint when planning expansion.
- SP8 does not arrive until H1 2027. If you are building machines now, SP7 is the only option; SP8's attractive numbers are months away.
- SP7 starts at 64 cores. There is no small-SP7 configuration this generation, so a requirement for a lower core count points you at SP8 or the previous generation.
There is one further variant: the AMD 9006 LP (codenamed Verano) is the first server EPYC to support LPDDR5X. It belongs to the Verano platform rather than Venice proper, tops out at 72 cores, carries LPDDR5X SOCAMM2 memory and 112Gbps xGMI interconnect, and is planned for H2 2027 — aimed squarely at AI rack nodes, following the same design logic as NVIDIA's Grace/Vera approach of placing memory next to the processor.
3. What the pricing reveals, and one data trap to avoid
AMD's pricing strategy here is worth unpacking. The flagship 9996 at 256 cores and $14,904 works out to about $58.2 per core. The entry SP7 part, the 64-core 9556, works out to about $125 per core. More cores means a lower cost per core, a clear nudge toward large customers buying high configurations.
The most telling comparison is against the previous generation. When Turin launched in October 2024, the 192-core EPYC 9965 was priced at $14,813. Venice's 9996 adds 64 more cores for $91 more — 64 extra cores for a 0.6% price increase. An add-this-much, pay-this-little move is rare in server CPU history.
One data trap worth stating plainly: $14,904 is AMD's published price at a 1,000-unit volume, i.e. an OEM purchasing basis, not what you or any single customer will pay. TechRadar makes the same point in its coverage: actual prices depend on order size, OEM discounts and negotiation. Using this number for a single-machine budget is wrong; its purpose is comparing the price-per-core structure across SKUs.
Performance claims need equally careful handling. AMD's official blog claims the EPYC 9996 delivers a 174% uplift (2.74x) in the CPU-side stages of an agentic AI pipeline against Intel's Xeon 6980P. AMD's own footnote is explicit: this is AMD internal testing (as of 11 July 2026) and covers only the CPU infrastructure layers of the agentic pipeline, not GPU inference performance. That qualifier must travel with the number; presenting "174%" as across-the-board superiority is a straightforward misreading. On the same basis, AWS Graviton5 scores 1.08x.
For context, Mercury Research puts AMD's server CPU revenue share at roughly 46%. Read alongside the pricing, that is a notably confident position.
4. How much supply is there? Reading the "2027 sold out" claim
Around 30 September, leaker Jukan posted on X that Venice's 2027 production allocation is fully allocated and AMD is taking orders for 2028. Several outlets relayed this, including reports citing Wccftech and unnamed channel sources.
By industry convention, channel reports like this are unconfirmed before official announcement, and AMD has not verified it. Jukan himself said he doubted the numbers at first, worried about the oversubscription-then-cancellation pattern seen last year. The measured approach is to treat it as a demand signal worth watching, not a confirmed fact.
A more grounded data point comes from Morgan Stanley's June 2026 report, which forecasts about 6.75 million Venice units shipping in 2027, ahead of NVIDIA's Vera CPU at 5.75 million. At the 31-SKU average of $7,691, that implies revenue in the region of $51 billion. That is a forecast too, not a realised result.
5. What this means for a small business in Guangzhou
Honestly, a 256-core flagship is far from what most 8-to-32-core servers in small companies run. But three layers of this news are practically useful:
- Knowing what the next generation looks like helps time your purchasing. SP7 ships in Q4 2026 and SP8 in H1 2027. If you plan a server refresh next year, you can start mapping SP8's price-per-core curve now rather than accepting whatever pricing arrives at launch.
- The per-core price gap is the number that matters to mid-sized buyers. $58 per core against $125 means buying one 64-core part instead of a 128-core part costs more than twice as much per core. For database and virtualisation workloads that are concurrency-bound but never fill 256 cores, that difference matters more than absolute performance. Choose by how many cores the workload can actually use, not by what the flagship offers.
- PCIe 6.0 and MRDIMM are "early to buy, early to regret" technologies. TechRadar notes PCIe 6.0 is not expected in ordinary PCs until around 2030, and MRDIMM — a registered server module built for AI memory bandwidth — may never reach them at all. Paying a premium for these now means buying capability you may never use. Unless you are explicitly running AI training or inference and memory bandwidth is already the bottleneck, do not pay extra for them.
One more signal worth noting: TechRadar reports Intel's 128-core Xeon 6980P launched at $17,800 in 2024 — more expensive than AMD's priciest part today. With the two vendors' flagship server CPUs priced in that order, AI compute demand has pushed server CPU pricing toward selling cores and bandwidth rather than percentage performance gains.
Specifications, power figures and performance data in this article were checked against AMD's official blog (published 23 July 2026) and reporting from 29 September to 1 October 2026. All prices cited are AMD's published per-thousand-unit figures. Production sold-out claims and shipment forecasts are channel and analyst predictions, not AMD-confirmed information. Base any purchasing decision on the actual quote you receive and your own workload profile — putting a flagship CPU to work on a light database load is the most common form of waste in server buying.
