October 12–13, 2026 — At the OCP Global Summit, Intel put a product name on the inference accelerator it had codenamed Crescent Island: Intel GPU D series. The headline spec is memory: up to 480GB of LPDDR5X on one card, 1.5TB/s of bandwidth, 1.3 PFLOPS of FP8 throughput, and a total board power of 350W on an air-cooled PCIe card. This is not a training card, and not a gaming card.
That mix is unusual. A 350W card that needs no liquid cooling and carries almost half a terabyte of memory reverses the priorities most AI accelerators have followed, and it arrives at a moment when memory capacity, not floating-point throughput, limits a lot of production inference.
For an IT buyer in Guangzhou, the appeal is conditional: if the building was never designed for liquid cooling and the power budget is already tight, a card that runs on air and holds a large model on its own changes the shape of a quote before anyone runs a benchmark.
Where 480 GB comes from
The D series is built on the Xe3P architecture, with 32 Xe cores and 256 XMX engines. The real break from mainstream AI accelerators is what sits on the board: there is no HBM. Intel uses LPDDR5X instead. The 480GB figure is the ceiling for partner-built cards; Intel's own branded card carries 160GB.
That choice buys three things: capacity, comparatively low cost, and a board that can live in an air-cooled rack. The bill shows up in bandwidth. The D series tops out at 1.5TB/s, while Intel's own Gaudi 3 pairs 128GB of HBM2e with 3.7TB/s. One design leans on capacity, the other on speed, and the buyer's job is to work out which shortage hurts more.
Capacity matters because large-model inference stalls on memory more often than on math. Weights, KV cache and long context all draw from the same pool, and a model that does not fit has to be split across machines. Intel's official claim is that a single card supports models up to 300 billion parameters and that an eight-card system handles more than 1 trillion. Every token of context adds to that cache, and the card has to hold weights and cache at the same time. For teams doing private deployments, the practical result is that some models which used to need multiple servers and a pile of cards can now sit in one air-cooled box.
The card is only part of the package
Intel also brought a rack-level pitch. Xeon 6+ scales to 288 cores, and one rack can hold 160 sockets — 80 dual-socket nodes, more than 46,000 cores in total — drawing 133.45 kW for the full rack, or roughly 834 W per socket. The number sounds extreme until you see what it feeds: the CPU side of an agentic pipeline, where token routing, retrieval, database queries and code execution all run.
The rack numbers are an argument about balance. A node packed with accelerators still depends on host CPUs to route requests, fetch data and run the surrounding code, and Intel sells the two halves as one design.
On the ecosystem side, ASRock Rack, ASUS, GIGABYTE, MiTAC Computing, MSI and Supermicro all have systems ready. Three are ORv3 racks and the rest are 19-inch chassis. Intel is also working with AMD, Dell, NVIDIA and Qualcomm in an OCP workgroup on the Open Adapter Card specification, which is meant to let accelerators from different vendors slide into the same open chassis. Intel says the hardware is in customer sampling with server OEMs, ODMs, neoclouds and ISVs, and that no price or volume date has been published. Intel's press render labels the card GPU D270.

Three takeaways
- Inference cards are splitting into camps. Training rewards compute and interconnect; inference rewards capacity and cost. The D series is the clearest example of the second school, because it does not chase a peak number, it chases how much fits on one card.
- Software is the weak spot and the wild card. Intel's oneAPI and IPEX ecosystem keeps improving, but the gap with CUDA has not closed. Day 0 support for Meta's 30B open-weight Muse Glimmer model suggests Intel understands that it has to close the out-of-the-box gap.
- 350W and air cooling are aimed at buildings that already exist. Not every data center can move to liquid cooling. A 350W card in a PCIe form factor can go into standard servers, and for budget-limited buyers that is worth more than peak throughput.
Who should pay attention, and who can skip it
| Scenario | Recommendation | Why |
|---|---|---|
| Private deployment of 70B–300B models | High priority | 480GB on one card cuts the card count, which cuts system and power cost |
| Long context, RAG, many concurrent streams | Good fit | Capacity buys concurrency, and the KV cache has more room |
| Large-model training | Poor fit | Bandwidth and interconnect were not designed for training |
| Lowest-latency online inference | Compare first | LPUs and high-end GPUs still hold an edge on latency |
| Heavy existing CUDA users | Be careful | Migration cost belongs in the total cost of ownership |
Buying notes for Guangzhou enterprises
- Do the memory math before the compute math. Write down parameter count, quantization, context length and concurrency, then work backward to the memory you need instead of starting from a TOPS figure.
- Ask which capacity you are being quoted. Intel's own card and partner cards do not carry the same memory, so price and lead time will differ.
- Pin down the software stack. Get version support for vLLM, PyTorch and OpenVINO in writing, and ask the supplier to run your own model on the hardware in front of you.
- Do not skip the power bill. 350W per card looks modest, but eight cards plus CPUs, memory and networking still means recalculating rack power.